Dr. Kiran Kumar V.G

B.E, M.Tech, Ph.D

Assoc. Professor & HOD

Profile: Dr Kiran Kumar V.G has completed his PhD from VTU Belagavi in Cryptography and VLSI, working as Associate professor in department of Electronics and Communication Engineering with teaching experience of over 22 years in reputed institutions. He has pursued M. Tech in Microelectronics and Control systems from N.M.A.M.I.T Nitte (VTU) securing III rank in VTU, and B.E in Electrical and Electronics from N.M.A.M.I.T Nitte (Mangalore University). His subjects of interest are Network Analysis, Control Systems, Electronic Circuits, Signals and systems, VHDL, VLSI, Real time systems and Microelectronics. He has participated in various workshops and been the judge in multiple national and international conferences. He has published papers in reputed peer reviewed, SCI and WoS journals. He is also a life member of ISTE chapter and Associate Member IETE.He has published 2 books namely Fundamentals of CMOS VLSI design and Introduction to CMOS VLSI design.



  • Ph.D - Visvesvaraya Technological University,2021
  • M.Tech - Visvesvaraya Technological University,2005
  • B.E - Mangalore University,1999


  • Cryptography and VLSI (Digital VLSI), Network Security

    1. Dr. Kiran Kumar V.G Guided Project Titled "Bilirubinometer" Granted "Rs. 5000" from Karnataka State Council for Science and Technology, 2023
    2. Indian Patent Published "System for hardware acceleration for embedded flash memory based on machine learning" in 2021
    3. Reviewer for the "Journal of Intitute of Engineer
    4. Reviewer for the "Journal of Ambient Intelligence and Humanized Computing" ,Springer-Verlag GmbH Germany, part of Springer Nature
    5. III Rank in VTU (M.Tech in Microelctronics and Control Systems) NMAMIT Nitte

                    JOURNALS: 21        CONFERENCE: 4
    JOURNALS
    1. FPGA implementation novel lightweight MBRISI cipher Journal of Ambient Intelligence and Humanized Computing. ISSN 1868-5145 https://doi.org/10.1007/s12652-022-03726-y
    2. "Design and Implementation of Novel BRISI Lightweight cipher for Resource Constrained Devices, Microprocessors and Microsystems, 2021, 104267, ISSN 0141-9331, https://doi.org/10.1016/j.micpro.2021.104267. https://www.sciencedirect.com/science/article/pii/S0141933121004348)
    3. FPGA implementation of a lightweight simple encryption scheme to secure IoT using novel key scheduling technique, International Journal of Applied Science and Engineering, 18, 2020153. https://doi.org/10.6703/IJASE.202106_18(2).002.
    4. Efficient Implementation of Cryptographic Arithmetic Primitives Using Reversible Logic and Vedic Mathematics".J. Inst. Eng. India Ser. B (2021). https://doi.org/10.1007/s40031-020-00518-w
    5. FPGA Implementation of Simple Encryption Scheme for Resource-Constrained Devices", International Journal of Advanced Trends in Computer Science and Engineering, Volume 9, No.4, July-August 2020. https://doi.org/10.30534/ijatcse/2020/213942020
    6. Implementation of Efficient Cryptographic Arithmetic Units, International Journal of Security and Its Applications (IJSIA), ISSN: 1738-9976(Print); 2207-9629(Online), NADIA, (2020), Vol. 14, No. 2, pp. 1-18. Doi:10.33832/ijsia.2020.14.2.01
    7. Design and Implementation of Efficient Cryptographic Arithmetic based on Reversible logic and Vedic Mathematics International Journal of Advanced Trends in Computer Science and Engineering, Volume 9 No.2 March-April 2020. https://doi.org/10.30534/ijatcse/2020/21922020
    8. A Novel Key Scheduling Algorithm for Lightweight Cryptographic Applications International Journal of Advanced Trends in Computer Science and Engineering, Volume 9, No.1, January-February 2020. https://doi.org/10.30534/ijatcse/2020/96912020. "
    9. Low Power High Speed Arithmetic Circuits International Journal of Recent Technology and Engineering (IJRTE) ISSN: 2277-3878 (Online), Volume-8 Issue-2, July 2019. Page No.: 807-813
    10. Cryptography using Modular Arithmetics International Journal of New Technology and Research. ISSN: 2454-4116, Volume-5, Issue-6, June 2019 Pages 23-26
    11. Implementation of Two LightWeight Cryptographic Algorithms IOSR Journal of Electronics and Communication Engineering (IOSR-JECE) e-ISSN: 2278-2834,p ISSN: 2278-8735.Volume 12, Issue 4, Ver. II (Jul.-Aug. 2017), PP 43-47
    12. Survey on High Speed Low Power Full Adder Circuits International Journal of Engineering Research & Technology (IJERT), ISSN: 2278-0181 Vol. 7 Issue 07, July-2018
    13. Implementation of Modular Reduction and Modular Multiplication Algorithms IOSR Journal of VLSI and Signal Processing (IOSR-JVSP e-ISSN: 2319-4200, p-ISSN No. 2319- 4197. Volume 8, Issue 6, Ver. I (Nov. - Dec. 2018), PP 34-38
    14. A Survey on Various Lightweight Cryptographic Algorithms on FPGA IOSR Journal of Electronics and Communication Engineering (IOSR-JECEVolume 12, Issue 1, Ver. II (Jan.-Feb. 2017), PP 54-59
    15. Implementation of MSEA using 8 bit reversible ALU International Journal of Engineering Research in Electronics and Communication Engineering (IJERECE) Vol 4, Issue 5, May 2017 PP 79-84.
    16. A Study and Comparison of Lightweight Cryptographic Algorithm IOSR Journal of Electronics and Communication Engineering (IOSR-JECE) e-ISSN: 2278-2834,p- ISSN: 2278-8735.Volume 12, Issue 4, Ver. II (Jul.-Aug. 2017), PP 20-25
    17. Design and Implementation of Citrus Classification Architecture on FPGA IOSR Journal of VLSI and Signal Volume 6, Issue 3, Ver. II, May-Jun. 2016, PP 18-25.
    18. FPGA Implementation of Lightweight Cryptographic Algorithms-A Survey International Journal for Research in Applied Science & Engineering Technology (IJRASET) Volume 4 Issue V, May 2016.
    19. An Efficient VLSI Implementation of CDF 5/3 Architecture on FPGA For Image Processing Applications IOSR Journal of VLSI and Signal Processing (IOSR-JVSP) Volume 6, Issue 3, Ver. II (May. -Jun. 2016), PP 111-115.
    20. Investigation into Power Quality Issue due to House Hold Equipments International Journal of Computer Science and Mobile Computing, Vol.5 Issue.6, Jun- 2016, pg. 138-148
    21. VLSI IMPLEMENTATION OF ARITHMETIC OPERATION IOSR Journal of VLSI and Signal Processing (IOSR-JVSP), Volume 6, Issue 3, Ver. II (May. -Jun. 2016), Pp 91-99
    CONFERENCE
    1. Lightweight cryptography for wireless sensor network using modified RC4 algorithm Third International conference on Electronics, Communication, Computer Technologies and Optimization Techniques (ICEECCOT-2018) Asmita Poojari,Nagesh H R, Kiran Kumar.V.G and C.Shantharama Rai December 12-15, 2018 in association with IEEE Bangalore section, organized by GSSS Institute of Engineering and Technology for Women, Mysuru.
    2. Implementation and Analysis of Cryptographic Ciphers in FPGA Kiran Kumar.V.G and C.Shantharama Rai "INTERNATIONAL CONFERENCE ON EMERGING TECHNOLOGIES IN DATA MINING AND INFORMATION SECURITY (IEMIS2018)held at University of Engineering & Management, Kolkata, West Bengal. India on February 23-25, 2018 with technical co-sponsorship Springer,NSERB,IEEE Kolkata
    3. "Comparative Study of cryptographic encryption algorithms" IOSR Journal of Electronics and Communication Engineering (IOSR-JECE) Volume 12, Issue 3, Ver. II (May - June 2017), PP 66-71
    4. Implementation of Lightweight Cryptographic Algorithms in FPGA Second International conference on Circuits, controls and communications Kiran Kumar.V.G ,C.Shantharama Rai,Asmita Poojari and Nagesh H R, December 15-16, 2017 with Technical co-sponsorship from IEEE Bangalore section, IEEECAS society Bangalore chapter, IEEE CIS society Bangalore chapter, IEEE COMSOC society Bangalore chapter

    1. Design and Implementation of Security Solution for Healthcare Systems, VTU- Research Grant scheme, Visvesvaraya Technological University Belagavi, 2021, 4,44,000/-

    PG: 15 (Completed)         5 (In Process)
    UG: 20 (Completed)         2 (In Process)

    1. Coordinator of EDC @ A J INSTITUTE OF ENGINEERING AND TECHNOLOGY, 2022
    2. Coordinator of Student Project @ A J INSTITUTE OF ENGINEERING AND TECHNOLOGY, 2022
    3. Entreprenureship-Development Cell Co-ordinator @ A J Institute of Engineering and Technology, 2019
    4. Chief Co-ordinator-PG- Coordinator VTU Extenstion center @ Sahyadri College of Engineering and Management, 2016-2018
    5. Department co-ordinator NAAC-Department of Electrical and Electronics Engineering @ Sahyadri College of Engineering and Management, 2016
    6. Deparment PG- Coordinator- VLSI and Embedded Systems @ Sahyadri College of Engineering and Management, 2015-2019
    7. Incharge HOD of Department of Electronics and Communication Engineering @ Sahyadri College of Engineering and Management, 2008-2010
    8. Chief co-ordinator of VTU Valuation center @ Sahyadri College of Engineering and Management, 2008-2010
    9. Incharge HOD of Department of Electrical and Electronics Engineering @ Canara Engineering College, 2004-2005

  • Google Scholar : - https://scholar.google.co.in/citations?user=FU6oyTgAAAAJ&hl=en,
  • ORCID : - https://orcid.org/0000-0001-9347-3867,
  • linkedin: - https://www.linkedin.com/in/kiran-kumar-7a111b40/
  • researchgate: - https://www.researchgate.net/profile/Kiran_Vg?ev=hdr_xprf&_sg=mKP95VGIK6S3MRuPl2ObAkbXV_lR7qNDNRxAT8RWpW3enwegaCFGqoSa1-nWk65OSpnoUa3g41oiX9fIF7Pqp2rY

    • PROFESSIONAL MEMBER
    1. MISTE, MIETE